$ 3 1e-9 382.76258214399064 50 5 50
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154 -232 -296 -184 -296 1 2 5 5
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155 -152 -216 -144 -216 1 5
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M -56 -264 -56 -288 2 2.5
M -56 -184 -56 -208 2 2.5
M -56 -96 -56 -120 2 2.5
M -56 -16 -56 -40 2 2.5
x -402 -315 -285 -312 4 20 4bitカウンタ
155 72 -264 80 -264 1 5
w 72 -248 56 -248 0
155 72 -184 80 -184 1 5
155 72 -96 80 -96 1 5
155 72 -16 80 -16 1 0
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155 152 56 160 56 1 5
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x 71 -276 120 -273 4 20 Reg1
x 149 -275 198 -272 4 20 Reg2
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w -48 128 -48 72 0
w -8 -184 -56 -184 0
w -8 -96 -56 -96 0
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I -232 144 -184 144 0 5 5
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x -305 48 -256 51 4 20 IF\sIN
x -312 168 -237 171 4 20 SYSCLK
x 214 -271 249 -268 4 20 Pa4
x 212 -190 247 -187 4 20 Pa3
x 213 -103 248 -100 4 20 Pa2
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x 215 48 250 51 4 20 Pa0
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M 272 -96 296 -96 2 2.5
M 272 -16 296 -16 2 2.5
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x -150 39 -100 42 4 20 DFF1
x -153 190 -103 193 4 20 DFF2
w -104 128 -48 128 0
x 63 -302 203 -299 4 20 立上り検出回路
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x 401 -305 541 -302 4 20 立下り検出回路
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M 608 -16 632 -16 2 2.5
M 608 -96 632 -96 2 2.5
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x 551 48 587 51 4 20 Pb0
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x 549 -103 585 -100 4 20 Pb2
x 548 -190 584 -187 4 20 Pb3
x 550 -271 586 -268 4 20 Pb4
w 360 -16 328 -16 0
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x 406 -283 455 -280 4 20 Reg3
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o 188 16 0 4102 5 0.1 0 2 188 3